LEVEL 15 / LESSON 09

AURIX EVADC

AURIX EVADC is Infineon's enhanced versatile ADC subsystem. Configuration details vary across TC2xx/TC3xx devices, so use the exact device user manual for groups, queues, channels and result registers.

01 / CONCEPT

AURIX EVADC

AURIX EVADC is Infineon's enhanced versatile ADC subsystem. Configuration details vary across TC2xx/TC3xx devices, so use the exact device user manual for groups, queues, channels and result registers.

ARCHITECTURE

Identify the block, clock/source dependencies, data path and interfaces.

CONFIGURE

Follow the target reference manual and change only documented fields.

VERIFY

Define the expected register state, timing or signal before running the test.

DEBUG

Inspect software state and measure hardware behavior rather than guessing.

02 / ENGINEERING WORKFLOW

From manual to measurement

  1. Read the architecture/reference-manual section.
  2. Identify clocks, pins, memory, interrupts and dependencies.
  3. Calculate required timing or configuration values.
  4. Implement the smallest working configuration.
  5. Build with warnings enabled and flash the target.
  6. Inspect registers and measure the external behavior.
  7. Document failures, assumptions and the final fix.
KEY TAKEAWAY

AURIX EVADC is Infineon's enhanced versatile ADC subsystem. Configuration details vary across TC2xx/TC3xx devices, so use the exact device user manual for groups, queues, channels and result registers.