LEVEL 16 / 20
DMA
Transfer data efficiently between memory and peripherals while coordinating completion and errors.
COURSE CONTENT
← RoadmapLearn it from architecture to measurement.
16.01
Why DMA?Concept → implementation → verification → debug
→16.02DMA ArchitectureConcept → implementation → verification → debug
→16.03Memory-to-PeripheralConcept → implementation → verification → debug
→16.04Peripheral-to-MemoryConcept → implementation → verification → debug
→16.05Channels / StreamsConcept → implementation → verification → debug
→16.06DescriptorsConcept → implementation → verification → debug
→16.07Transfer CompletionConcept → implementation → verification → debug
→16.08DMA InterruptsConcept → implementation → verification → debug
→16.09UART/SPI DMAConcept → implementation → verification → debug
→16.10Debugging DMAConcept → implementation → verification → debug
→16.11Interview QuestionsConcept → implementation → verification → debug
→